1. Field of the Invention
This invention relates to printed wiring board assemblies having a controlled, relatively low, coefficient of thermal expansion, in general, and to such printed wiring board assemblies which are useful for the surface mounting of ceramic chip carriers, in particular.
2. Prior Art
Printed wiring boards are well known in the electronics industry for, inter alia, supporting electronic components. Many printed wiring boards are of the type wherein components are mounted on the board by insertion of leads into through-holes in the printed wiring board. However, it has been observed that this type of structure or packaging provides relatively low packaging density.
Inamsuch as it is highly desirable to obtain high density packaging in the same size or to produce circuit assemblies with significant reductions in physical size and/or weight, other types of packaging are utilized. This type of packaging is frequently referred to as surface-mounting of components. In some studies it has been shown that a 75% reduction in the required area of the circuit board can be achieved with surface mounting of components. Obviously, an additional 50% reduction of surface area can be achieved if both sides of the printed circuit board are utilized. (It is clear that this type of mounting is not feasible with conventional through-hole mounting arrangements.)
Other advantages in the utilization of surface mounted components is the reduction in lead lengths as well as the improvement in uniformity of such leads. By this improvement, other undesirable characteristics such as parasitic capacitance, inductance, and resistance in the lead lines is reduced.
Also, ceramic chip carriers show advantageous characteristics in terms of hermeticity, reliability, low cost, testability and burn-in prior to installation of the component on the board.
However, the major difficulty with surface mounted components is, in addition to the inspection difficulty (i.e. the component is mounted over the junction with the board), the problem of the coefficient of thermal expansion (CTE) mismatch which occurs as a result of the different thermal expansion rates of the component and the PC board. That is, most printed circuit or printed wiring boards have a relatively high coefficient of thermal expansion while surface mounted devices fabricated of a ceramic material, have a relatively low CTE. Typically, the circuit board CTE is about 8 PPM/.degree.F. while the ceramic chip carriers have a CTE of approximately 4 PPM/.degree.F. With these significant differences in the CTE, continuous thermal cycling causes fatigue and other problems such as breakage in the junctions or the like.
Consequently, it is highly desirable to produce a printed wiring board which has a coefficient of thermal expansion which is the same as or similar to the CTE of the surface mounted components.
Obviously, the circuit boards could be made of a material such as ceramic or the like to effect this compatibility. However, ceramic circuit boards are both heavy and expensive, as well as difficult to work with or the like. Also, such ceramic boards may be fragile and easily broken.
One solution to the CTE mismatch problem has been described in the prior art and is shown and described in U.S. Pat. No. 4,318,954 to W. M. Jensen and entitled PRINTED WIRING BOARD SUBSTRATES FOR CERAMIC CHIP CARRIERS. However, this approach has the undesirable characteristics of requiring that a support member in the form of a slab of a filament-reinforced thermosetting resin is disposed adjacent to or between printed wiring boards. The printed wiring boards are electrically insulated from said support member. This non-conductive layer significanly reduces heat transfer within the printed wiring board which will add to a heat removal problem already magnified by increased packaging density, or conversely, prevent the desired result of increased packaging density. With this approach, the CTE problem can be overcome but the laying up of the support member, the adhesive layers and the printed circuit boards can become a significant problem in terms of the fabrication cost and processing of circuit boards of this type.
In addition, the additional expense of producing the support member/slab can become a significant consideration when forming these boards. This additional cost is not, generally, overcome by the other advantages of this type of board.
Other approaches to this problem are described in an article entitled "Kevlar as the Reinforcing Fiber in Printed Wiring Board Materials," by Carl T. Brooks, in PCFAB, February 1982, pages 32-36, especially pages 34 and 36. Also, this problem is discussed in the IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS AND MANUFACTURING TECHNOLOGY, Vol. CHMT-2, No. 1, March, 1979 in a paper entitled "Low Expansive Organic Substrate for Flip-Chip Bonding" by S. E. Greer, pages 140-144. Each of these publications describes the use of Kevlar, a product of E. I. DuPont de Nemours & Company as a suitable material for use in laminates used in the preparation of circuit boards which are to be used for mounting ceramic chips thereon. These publications especially describe the use of Kevlar laminates in lieu of alumina or other similar material as the printed circuit board base component.
In an attempt to eliminate the CTE mismatch problem which has significantly slowed the implementation of ceramic leadless chip carriers, numerous alternative approaches have been explored. These approaches include, inter alia, the use of elastomerics, leaded carriers, sockets, ceramic substrates, metallic supports, fiberous reinforcement and numerous resins. The approaches have been tried individually and in combination. However, most of these approaches suffer from shortcomings which cause the respective approaches to be undesirable in this particular area. For example, the elastomeric devices suffer from production problems with no overriding advantages over the other alternatives. Leaded carriers are expensive, difficult to handle and generally require additional PC board "real estate". The use of sockets negates the size, weight, cost and production advantages to be obtained through surface mounting techniques. Ceramic substrates provide excellent CTE matching but cost and processing requirements are very restrictive. Metallic supports such as Invar , Kovar and Alloy 42 include weight and cost penalties. Such units fabricated of titanium, molybdenum and porcelainized steel are not cost effective. The use of advanced fibers is considered to be one of the more promising approaches. Such fibers include aramid, quartz, graphite, boron (and variations on all of these). Also, blended weaves of two or more of these fiber types have been found desirable. Various resins have been explored in conjunction with all of the above.
Thus, it is clear that a significant amount of time, energy and expense have been utilized in extensive research over a number of years in order to permit the use of surface mounting techniques especially in the case of ceramic leadless chip carriers in order to obtain the advantages thereof. However, none of the existing devices has proved to be completely satisfactory. Moreover, most of the research to date has led to very sophisticated, highly complicated solutions. Consequently, further investigation is under way and has spawned the instant invention.